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Han D., Yoo H.-J. On-Chip Training NPU - Algorithm, Architecture and SoC Design

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Han D., Yoo H.-J. On-Chip Training NPU - Algorithm, Architecture and SoC Design
Springer. 2023. — 249 p.
Unlike most available sources that focus on deep neural network (DNN) inference, this book provides readers with a single-source reference on the needs, requirements, and challenges involved with on-device, DNN training semiconductors, and SoC design. The authors include coverage of the trends and history surrounding the development of on-device DNN training, as well as on-device training semiconductors and SoC design examples to facilitate understanding.
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